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THE 35th
ANNUAL IEEE/ACM INTERNATIONAL
SYMPOSIUM ON
MICROARCHITECTURE
with special emphasis on
Instruction-Level Parallelism
Co-sponsored
by IEEE TC-uARCH and ACM SIGMICRO
General Chair
Kemal Ebcioğlu, IBM Program Chairs
Scott Mahlke, Michigan B. Ramakrishna Rau, HP Local Arrangements Chair
Sadun Anık, Garanti Finance Chair Irma Esmer, Intel Workshops Chair Erik Altman, IBM Tutorials Chair Evelyn Duesterwald, HP Publicity Chair Dan Connors, Colorado Publications Chair Sanjay Patel, Illinois Registration Chair Emre Özer, Agere Student Advocate
Haldun Hadimioglu, Polytechnic University
Faculty Liaisons in Turkey
Bulent Orencik, Istanbul Technical Univ Ahmet Akkas, Koc Univ.
Steering Committee Richard Belgard, Consultant, Chairman
Tom Conte, NC State Kemal Ebcioglu, IBM Matt Farrens, UC-Davis Josh Fisher, HP Labs Wen-mei Hwu, Univ. of Illinois Yale Patt, Univ. of Texas,
Austin Ronny Ronen, Intel Israel Mike Schlansker, HP Labs Andy Wolfe, SONICblue Santosh Abraham, Sun Saman Amarasinghe, MIT David August, Princeton Todd Austin, Michigan Pradip Bose, IBM Brad Calder, UCSD Doug Carmean, Intel Tom Conte, NCSU Jim
Dehnert, Transmeta Srinivas
Devadas, MIT Matt Farrens, UC-Davis Guang
Gao, Delaware Antonio
González, UPC Rajiv
Gupta, Arizona Wei
Hsu, Minnesota Wen-mei
Hwu, Illinois Richard Johnson, Transmeta Roy Ju, Intel Josep Llosa, UPC Bill Mangione-Smith, UCLA Margaret
Martonosi, Princeton Sanjay
Patel, Illinois Yale Patt, Texas Ronny Ronen, Intel Eric Rotenberg, NCSU Mike Schlansker, HP Jim Smith, Wisconsin Carol Thompson, HP Kees Vissers, Trimedia |
The 35th International Symposium on Microarchitecture is
the premier forum for discussing new techniques to extract high levels of
instruction-level parallelism via hardware and software. The goals of this
symposium are to bring together researchers in fields related to
microarchitecture and instruction-level parallelism, to encourage technical
interaction, and to advance the state of the art of high-performance
microarchitectures and fine-grain parallel processing. This year's conference
will be held in Istanbul, Turkey, a city of historical treasures, where East
meets West on the blue waters of the Bosphorus. Papers are solicited in
fields including the following: · ILP architectures and designs:
superscalar, VLIW, multithreaded, … · Compiler techniques for
instruction-level parallelism · Architectures and compilers for
embedded processors, DSPs, ASIPs (ubiquitous computing devices, network
processors, multimedia, wireless, …) · Hardware/software techniques for
efficient systems on a single chip · Dynamic optimization, emulation, and
object code translation · Advanced software and hardware
speculation and prediction schemes · Hardware/compiler techniques for
improving memory system performance · Hardware/compiler techniques for
low-power computing · Theoretical foundations of
instruction level parallelism · Novel approaches to fine-grain
parallel processing THE DEADLINE FOR SUBMISSIONS IS JUNE 10th,
2002 There is an automatic one-week extension for late papers. There will be no other extensions. Please submit one electronic copy of the
paper in PDF format, using our website. Notification of acceptance will occur
by August 12, 2002. For more information please consult the conference
website: http://www.microarch.org/micro35 |
Important
dates: SUBMISSION: JUNE 10
Acceptance: AUG 12 Final
Version SEP 9