Energy Efficient Frequent Value Data Cache Design
Authors:
Jun Yang
Department of Computer Science and Engineering
University of California, Riverside
Rajiv Gupta
Department of Computer Science
The University of Arizona
Abstract:
Recent work has shown that a small number of distinct frequently occurring
values often account for a large portion of memory accesses. In this paper
we demonstrate how this frequent value phenomenon can be exploited in
designing a cache that trades off performance with energy efficiency. We
propose the design of the Frequent Value Cache (FVC) in which storing a
frequent value requires few bits as they are stored in encoded form while
all other values are stored in unencoded form using 32 bits. The data
array is partitioned into two arrays such that if a frequent value is
accessed only the first data array is accessed; otherwise an additional
cycle is needed to access the second data array. Experiments with some of
the SPEC95 benchmarks show that on an average a 64Kb/64-value FVC provides
28.8% reduction in L1 cache energy and 3.38% increase in execution time
delay over a conventional 64Kb cache.
Web Site:
http://www.cs.arizona.edu/people/gupta/research/Projects/power.html