Abstract
Unlike the historic microprocessor era, where computers were
built with standard silicon parts, most computation is now
performed by SoCs, where every new SoC design is an opportunity
for application-specific customization. But realizing the
potential benefits of greater specialization in commercial
products requires advances in design productivity, as
unsustainable SoC hardware and software design cost scaling is
already a far greater challenge than transistor scaling. This
productivity challenge lies behind the resurgence of interest in
open-source hardware. The hope is that the hardware industry can
replicate the success of the software industry, where innovative
products are often created by mostly reusing existing code from
open-source software stacks. While the open-source hardware
movement has recently been driven by the widespread momentum
behind RISC-V, a free and open ISA is only one component among
many that will be needed to create a vibrant open SoC ecosystem.
The architecture community is ideally placed to help fill out the
open-source SoC stack and enable a new era of frictionless
open-source hardware innovation.
Bio
Krste Asanovic is a Professor in the EECS Department at the
University of California, Berkeley. He is also Chairman of the
Board of the RISC-V Foundation, and is a co-founder and Chief
Architect at SiFive. His main research areas are computer
architecture, VLSI design, parallel programming, and operating
system design, and he is co-director of the Berkeley ADEPT lab,
which is aiming to reignite hardware innovation by reducing the
cost and effort of deploying custom silicon for new cloud and
edge applications. He is an ACM Fellow and an IEEE Fellow.
Abstract
Increasing computing performance enables new applications and
greater value from computing. With the end of Moore's Law and
Dennard Scaling, continued performance scaling will come
primarily from specialization. Specialized hardware engines can
achieve performance and efficiency from 10x to 10,000x a CPU
through specialization, parallelism, and optimized memory access.
Graphics processing units are an ideal platform on which to build
domain-specific accelerators. They provide very efficient, high
performance communication and memory subsystems - which are
needed by all domains. Specialization is provided via "cores",
such as tensor cores that accelerate deep learning or ray-tracing
cores that accelerate specific applications. This talk will
describe some common characteristics of domain-specific
accelerators via case studies.
Bio
Bill Dally is Chief Scientist and Senior Vice President of
Research at NVIDIA Corporation and a Professor (Research) and
former chair of Computer Science at Stanford University. Bill is
currently working on developing hardware and software to
accelerate demanding applications including machine learning,
bioinformatics, and logical inference. He has a history of
designing innovative and efficient experimental computing
systems. While at Bell Labs Bill contributed to the BELLMAC32
microprocessor and designed the MARS hardware accelerator. At
Caltech he designed the MOSSIM Simulation Engine and the Torus
Routing Chip which pioneered wormhole routing and virtual-channel
flow control. At the Massachusetts Institute of Technology his
group built the J-Machine and the M-Machine, experimental
parallel computer systems that pioneered the separation of
mechanisms from programming models and demonstrated very low
overhead synchronization and communication mechanisms. At
Stanford University his group developed the Imagine processor,
which introduced the concepts of stream processing and
partitioned register organizations, the Merrimac supercomputer,
which led to GPU computing, and the ELM low-power processor. Bill
is a Member of the National Academy of Engineering, a Fellow of
the IEEE, a Fellow of the ACM, and a Fellow of the American
Academy of Arts and Sciences. He has received the ACM
Eckert-Mauchly Award, the IEEE Seymour Cray Award, the ACM
Maurice Wilkes award, the IEEE-CS Charles Babbage Award, and the
IPSJ FUNAI Achievement Award. He currently leads projects on
computer architecture, network architecture, circuit design, and
programming systems. He has published over 250 papers in these
areas, holds over 160 issued patents, and is an author of the
textbooks, Digital Design: A Systems Approach, Digital Systems
Engineering, and Principles and Practices of Interconnection
Networks.
Abstract
In 2015, US Chief Technology Officer Megan Smith raised profound
questions about women's contributions in science, engineering and
math being erased from history. In this talk we explore a case
study of such erasure and surface a very counterintuitive
conjecture about the underlying causes and effects.
For more information, please refer to "The Disappeared: Beyond Winning and Losing", which appeared in IEEE Computer in October 2018.
Bio
After earning her BS and MSEE from Columbia University, Lynn
joined IBM Research in 1964, where she made foundational
contributions to computer architecture. Fired by IBM as she
underwent gender transition in 1968, Lynn started her career all
over again in 'stealth mode'.
Joining Xerox Palo Alto Research Center in 1973, Lynn invented scalable MOS design rules and simplified methods for silicon chip design, was principal author of the famous 'Mead-Conway' text, and pioneered the teaching of these methods at MIT — launching a world-wide revolution in VLSI microelectronic system design in the late 1970s. Lynn also invented an ARPAnet based e-commerce infrastructure for rapid chip-prototyping in 1979, spawning the modern "fabless design" plus "silicon foundry" industry model for semiconductor design and manufacturing. Lynn joined the University of Michigan in 1985 as Professor of EECS and Associate Dean of Engineering, where she continued her distinguished career.
A Fellow of the IEEE and the AAAS, Lynn has won many awards for her contributions including the Computer Pioneer Award of the IEEE Computer Society, Wetherill Medal of the Franklin Institute, induction into the Computer History Museum's Hall of Fellows, election to the National Academy of Engineering, and four honorary doctorates. Awarded the 2015 James Clerk Maxwell Medal by the IEEE and the Royal Society of Edinburgh, her citation included these words: "Lynn Conway's work has provided the underpinnings for innovations, discoveries and achievements in every area of scientific and humanitarian study."