Morning

Afternoon

Sat Oct 12

FireSim / Chipyard

tutorial
Location: Robert King (Hilton lobby level)

ONNC for NVDLA NNs

tutorial
Location: Edna Hopkins (Hilton lobby level)

Timeloop / Accelergy

tutorial
Location: Edward Hayden (Hilton lobby level)

OpenPiton + RISC-V

tutorial
Location: Edna Hopkins (Hilton lobby level)

Morning

Afternoon

Sun Oct 13

CWWMCA

workshop
Location: Edna Hopkins (Hilton lobby level)

NoCArc

workshop
Location: Elijah Pierce B (Hilton lobby level)

CHIPKIT

tutorial
Location: Elijah Pierce A (Hilton lobby level)

High-Perf Distributed Deep Learning

tutorial
Location: Elijah Pierce A (Hilton lobby level)

MCAt

tutorial
Location: Edward Hayden (Hilton lobby level)

Daily Schedule

7:30 AM – 5:00 PM: Registration

Location: Hilton lobby level

7:30 AM – 8:30 AM: Breakfast

Location on Saturday: Elijah Pierce A & B (Hilton lobby level)
Location on Sunday: George Bellows A & B (Hilton lower level)

8:30 AM – 10:30 AM: Workshop/Tutorial Sessions

10:30 AM – 11:00 AM: Coffee Break

11:00 AM – 12:00 PM: Workshop/Tutorial Sessions

12:00 PM – 1:00 PM: Lunch

Location on Saturday: Elijah Pierce A & B (Hilton lobby level)
Location on Sunday: George Bellows A & B (Hilton lower level)

1:00 PM – 3:00 PM: Workshop/Tutorial Sessions

3:00 PM – 3:30 PM: Coffee Break

3:30 PM – 5:00 PM: Workshop/Tutorial Sessions

Sunday, 6:00 PM – 8:00 PM: Conference Reception

Location: George Bellows Ballroom (Hilton lower level)

Map of Rooms

Hilton Room Map
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NoCArc: Network-on-Chip Architectures

Website

http://www.nocarc.org/

At a Glance

  • Format: keynotes, paper presentations
  • Abstracts Due: August 8, 2019
  • Full Papers Due: August 19, 2019

Organizers

  • Maurizio Palesi
    University of Catania
  • Kun-Chih (Jimmy) Chen
    National Sun Yat-Sen University
  • Sergi Abadal
    Universitat Politècnica de Catalunya
  • Salvatore Monteleone
    University of Catania
  • William Fornaciari
    Politecnico di Milano
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Tutorial on FireSim and Chipyard: End-to-End Architecture Research with RISC-V SoC Generators, Agile Test Chips, and FPGA-Accelerated Simulation on Amazon EC2 F1

Website

https://fires.im/micro-2019-tutorial/

At a Glance

  • Format: tutorial

Organizers

  • Sagar Karandikar
    University of California, Berkeley
  • David Biancolin
    University of California, Berkeley
  • Alon Amid
    University of California, Berkeley
  • Krste Asanovic
    University of California, Berkeley
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OpenPiton with RISC-V Cores — A Hands-On Tutorial with the Open Source Manycore Processor

Website

https://parallel.princeton.edu/openpiton/ MICRO19_tutorial.html

At a Glance

  • Format: tutorial

Organizers

  • David Wentzlaff
    Princeton University
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ONNC Compiler Porting and Optimization for NVDLA-Based Neural NEtwork Inference Engines

Website

https://skymizer.com/Micro2019_tutorial

At a Glance

  • Format: tutorial

Organizers

  • Wei-Fen Lin
    Skymizer Taiwan Inc.
  • Cheng-Tao Hsieh
    Skymizer Taiwan Inc.
  • Po-Yen Chen
    Skymizer Taiwan Inc.
  • Cheng-Yi Chou
    Skymizer Taiwan Inc.
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CHIPKIT: Tutorial on Agile Research Test Chips

Website

https://mrc-donato.github.io/CHIPKIT-Tutorial/

At a Glance

  • Format: tutorial

Organizers

  • Paul Whatmough
    Arm Research
  • Marco Donato
    Harvard University
  • Glenn G. Ko
    Harvard University
  • David Brooks
    Harvard University
  • Gu-Yeon Wei
    Harvard University
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High-Performance Architectures for Distributed Deep Learning

Website

http://web.cse.ohio-state.edu/~subramoni.1/ micro19-dl-tut.html

At a Glance

  • Format: tutorial

Organizers

  • Dhabaleswar K. (DK) Panda
    The Ohio State University
  • Ammar Ahmad Awan
    The Ohio State University
  • Hari Subramoni
    The Ohio State University
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Career Workshop for Women and Minorities in Computer Architecture

Website

https://www.colorado.edu/conference/cwwmca/

At a Glance

  • Format: keynotes, invited talks, panels, poster session
  • Poster Abstracts Due: August 28, 2019 September 2, 2019

Organizers

  • Valentina Salapura
    IBM Research
  • Zehra Sura
    IBM Research
  • Alan Bivens
    IBM Research
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MCAt: Combining Machine Learning and Control Theory for Computer Architecture

Website

http://iacoma.cs.uiuc.edu/mcat/

At a Glance

  • Format: tutorial

Organizers

  • Raghavendra Pradyumna Pothukuchi
    University of Illinois at Urbana–Champaign
  • Henry Hoffman
    University of Chicago
  • Josep Torrellas
    University of Illinois at Urbana–Champaign
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Timeloop/Accelergy Tutorial: Tools for Evaluating Deep Neural Network Accelerator Designs

Website

http://accelergy.mit.edu/tutorial.html

At a Glance

  • Format: tutorial

Organizers

  • Joel S. Emer
    Massachusetts Institute of Technology
    NVIDIA
  • Vivienne Sze
    Massachusetts Institute of Technology
  • Angshuman Parashar
    NVIDIA
  • Yakun Sophia Shao
    University of California, Berkeley
  • Yannan Nellie Wu
    Massachusetts Institute of Technology
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