The IEEE/ACM International Symposium on Microarchitecture® (MICRO) is the premier forum for for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas. The MICRO community has enjoyed a close interaction between academic researchers and industrial designers, and we aim to continue this tradition at MICRO-57. In 2024, MICRO goes to Austin, Texas, USA.

Important Dates

  • Abstract Deadline: April 11, 2024 at 11:59 PM CDT
  • Full Paper Deadline: April 18, 2024 at 11:59 PM CDT
  • Notification: July 19, 2024

Papers are solicited on a broad range of topics, including (but not limited to):
  • Microarchitectural, architectural, compiler, and hybrid techniques for improving system performance, power, energy-efficiency, security, cost, complexity, programmer productivity, predictability, quality of service, reliability, dependability, scalability, or sustainability
  • Processor, memory, and storage architectures
  • Multicore and multiprocessor systems
  • Instruction-, thread-, and data-level parallelism
  • Prediction and Speculation
  • Memory Hierarchy
  • Cloud and datacenter-scale computing
  • IoT, mobile, and embedded architecture
  • Interconnection network, router, and network interface architecture
  • Accelerator-based, application-specific, and reconfigurable architectures
  • Architectural support for programming languages, compilation, software development, security and privacy, virtualization
  • Architectures for emerging technologies and applications
  • Architectural support for non-volatile/persistent memory
  • Quantum computing
  • In-/near-memory or in-/near-storage processing
  • Approximate computing and architectural support for approximation
  • Effects of circuits and technology on architecture
  • Architecture modeling and simulation methodologies
  • Evaluation and measurement of real computing systems

Papers should be submitted for blind review. Submissions should follow the guidelines and formatting rules specified on the conference website (TBA). Papers that violate these guidelines and rules may be returned to author(s) without review. Papers will go through a rigorous peer-review process. All accepted papers will be presented at the conference.