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Annual IEEE/ACM International Symposium on Microarchitecture®

MICRO Test of Time Award

The MICRO Test of Time (ToT) award recognizes the most influential papers published in prior sessions of the International Symposium on Microarchitecture, each of whom have had significant impact in the field.

Every year, papers are nominated for the award, either by recommendation from members of the computer architecture community, or automatically if they meet a minimum citation count criterion. Winning papers are selected by the ToT Award Committee (see committee formation guidelines), and are announced at that year's MICRO conference.

2023 Award Committee
Murali Annavaram
Reetuparna Das
Antonio González
Sudhavna Gurumurthi
Aamer Jaleel, chair
André Seznec
Viji Srinivasan

2023 Paper Nominations

Nominations are now open for the 2023 award, and are due on August 31, 2023. Please read the call for nominations to see how you can nominate a paper.

Past ToT Award Winners

2022

The following two papers were awarded the ninth MICRO Test of Time Award in 2022. These papers were selected from among all the 156 eligible papers published in MICRO conferences that were held between 2000 and 2004 (inclusive).

ConferencePaper TitleAuthors
MICRO 2003 A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
MICRO 2003 Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data Canturk Isci, Margaret Martonosi

2021

The following two papers were awarded the eighth MICRO Test of Time Award in 2021. These papers were selected from among all the 153 eligible papers published in MICRO conferences that were held between 1999 and 2003 (inclusive).

ConferencePaper TitleAuthors
MICRO 2003 Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen
MICRO 2003 Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge

Related Documents

2021 Call for Nominations


2020

The following three papers were awarded the seventh MICRO Test of Time Award in 2020. These papers were selected from among all the 148 eligible papers published in MICRO conferences that were held between 1998 and 2002 (inclusive).

ConferencePaper TitleAuthors
MICRO 1998 A Dynamic Multithreading Processor Haitham Akkary, Michael A. Driscoll
MICRO 1999 Fetch Directed Instruction Prefetching Glenn Reinman, Brad Calder, Todd M. Austin
MICRO 2000 A Permutation-Based Page Interleaving Scheme to Reduce Row-Buffer Conflicts and Exploit Data Locality Zhao Zhang, Zhichun Zhu, Xiaodong Zhang

2019

The following two papers were awarded the sixth MICRO Test of Time Award in 2019. These papers were selected from among all the 148 eligible papers published in MICRO conferences that were held between 1997 and 2001 (inclusive).

ConferencePaper TitleAuthors
MICRO 1999 Selective Cache Ways: On-Demand Cache Resource Allocation David H. Albonesi
MICRO 2001 Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution Ravi Rajwar, James R. Goodman

2018

The following three papers were awarded the fifth MICRO Test of Time Award in 2018. These papers were selected from among all the 149 eligible papers published in MICRO conferences that were held between 1996 and 2000 (inclusive).

ConferencePaper TitleAuthors
MICRO 1996 Efficient Path Profiling Thomas Ball, James R. Larus
MICRO 1996 Assigning Confidence to Conditional Branch Predictions Erik Jacobsen, Eric Rotenberg, James E. Smith
MICRO 1999 DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design Todd M. Austin

2017

The following paper was awarded the fourth MICRO Test of Time Award in 2017. This paper was selected from among all the 156 eligible papers published in MICRO conferences that were held between 1995 and 1999 (inclusive).

ConferencePaper TitleAuthors
MICRO 1996 Exceeding the Dataflow Limit Via Value Prediction Mikko H. Lipasti, John Paul Shen

Related Documents

2017 Call for Nominations


2016

The following paper was awarded the third MICRO Test of Time Award in 2016. This paper was selected from among all the 156 papers published in MICRO conferences that were held between 1994 and 1998 (inclusive).

ConferencePaper TitleAuthors
MICRO 1994 Iterative Modulo Scheduling: An Algorithm for Software Pipelining Loops B. Ramakrishna Rau

Related Documents

2016 Call for Nominations

Award Presentation (PDF)

Onur Mutlu, Scott A. Mahlke, Thomas M. Conte, Wen-mei W. Hwu
Iterative Modulo Scheduling
IEEE Micro, Vol. 38, No. 1, January/February 2018


2015

The following paper was awarded the second MICRO Test of Time Award in 2015. This paper was selected from among all the 156 papers published in MICRO conferences that were held between 1993 and 1997 (inclusive).

ConferencePaper TitleAuthors
MICRO 1996 Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching Eric Rotenberg, Steve Bennett, James E. Smith

2014

The following are the 10 papers that were awarded the first MICRO Test of Time Award in 2014. These 10 papers were selected from among all the 544 papers published in MICRO conferences that were held between 1968 and 1992 (inclusive).

ConferencePaper TitleAuthors
MICRO 1978 Microprogrammed Implementation of A Single Chip Microprocessor Skip Stritter, Nick Tredennick
MICRO 1981 Some Scheduling Techniques and An Easily Schedulable Horizontal Architecture for High Performance Scientific Computing B. Ramakrishna Rau, C. D. Glaeser
MICRO 1982 MIPS: A Microprocessor Architecture John Hennessy, Norman Jouppi, Steven Przybylski, Christopher Rowen, Thomas Gross, Forest Baskett, John Gill
MICRO 1985 Critical Issues Regarding HPS, A High Performance Microarchitecture Yale N. Patt, Stephen W. Melvin, Wen-mei Hwu, Michael C. Shebanow
MICRO 1985 HPS, A New Microarchitecture: Rationale and Introduction Yale N. Patt, Wen-mei Hwu, Michael Shebanow
MICRO 1988 Hardware Support for Large Atomic Units in Dynamically Scheduled Machines Stephen W. Melvin, Michael C. Shebanow, Yale N. Patt
MICRO 1991 Two-Level Adaptive Training Branch Prediction Tse-Yu Yeh, Yale N. Patt
MICRO 1992 Effective Compiler Support For Predicated Execution Using the Hyperblock Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger A. Bringmann
MICRO 1992 Code Generation Schema for Modulo Scheduled Loops B. Ramakrishna Rau, Michael S. Schlansker, P. P. Tirumalai
MICRO 1992 Executing Compressed Programs on An Embedded RISC Architecture Andrew Wolfe, Alex Chanin

Related Documents

2014 Call for Nominations (PDF)

Onur Mutlu, Rich Belgard
Introducing the MICRO Test of Time Awards: Concept, Process, 2014 Winners, and the Future
IEEE Micro, Vol. 35, No. 2, March/April 2015

Onur Mutlu, Rich Belgard, Nick Tredennick, Mike Schlansker
The 2014 MICRO Test of Time Award Winners: From 1978 to 1992
IEEE Micro, Vol. 36, No. 1, January/February 2016

Onur Mutlu, Rich Belgard, Thomas R. Gross, Norman P. Jouppi, John L. Hennessy, Steven A. Przybylski, Chris Rowen, Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Tse-Yu Yeh, Andy Wolfe
Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor
IEEE Micro, Vol. 36, No. 4, July/August 2016

Guidelines for the Formation of the MICRO ToT Award Committee

Draft version, based on IEEE TCCA guidelines on HPCA ToT Award Committee formation